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Fault tree analysis (FTA)

Fault tree analysis is a top-down, deductive reliability technique. You start with an undesired top event (system failure) and work downward, asking what combinations of lower-level events could cause it. Logic gates connect the events: an OR gate fires when any input fails; an AND gate fires only when all inputs fail simultaneously.

Gate probability rules

OR gate (any input causes the top event to occur): P(output) = 1 − ∏(1 − P(inputᵢ)) For two inputs: P = 1 − (1−P₁)(1−P₂) AND gate (all inputs must fail together): P(output) = ∏ P(inputᵢ) For two inputs: P = P₁ × P₂

Worked example

System fails (top event) if either the control subsystem OR the actuator subsystem fails.

Control subsystem fails (AND gate): Component A (P = 0.05) AND Component B (P = 0.02) must both fail.
Actuator subsystem fails (OR gate): Component C (P = 0.03) OR Component D (P = 0.01) fails.

Control subsystem (AND): P_ctrl = 0.05 × 0.02 = 0.001 Actuator subsystem (OR): 1 − 0.97 × 0.99 = 0.0397 P_act = 0.0397 Top event (OR of control and actuator): P_top = 1 − (1 − 0.001) × (1 − 0.0397) = 1 − 0.999 × 0.9603 = 0.0407

Interpretation: the system fails with probability 4.07% (about 1 in 25). The actuator OR gate (P = 4.0%) dominates. Improving Component C or D is the highest-leverage action.

Minimal cut sets

A minimal cut set is the smallest combination of component failures that causes the top event. In this example the cut sets are: {A, B} and {C} and {D}. Single-component cut sets ({C}, {D}) are the most critical because a single failure can bring the system down.

Common exam traps

OR gates increase system unreliability; AND gates reduce it. Adding redundancy (parallel paths = AND logic for all to fail) improves reliability. Series systems use OR logic for failures.
FTA assumes binary (failed or working) states. Partial failure and degraded modes require extensions like the multi-state FTA or a FMEA with severity gradations.
FTA is deductive (top-down); FMEA is inductive (bottom-up). FTA asks “what could cause this failure?” FMEA asks “what could go wrong with this component?”

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